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#include "l.h"
Optab optab[] =
{
/* add */ AADD, C_REG, C_REG, 0,1, 4, OOP, 0, 0,
/* sub */ ASUB, C_REG, C_REG, 0,5, 4, OOP, 0, 0x20,
/* sll */ ASLL, C_REG, C_REG, 0,0, 4, OOP, 1, 0,
/* slt */ ASLT, C_REG, C_REG, 0,0, 4, OOP, 2, 0,
/* sltu */ ASLTU, C_REG, C_REG, 0,0, 4, OOP, 3, 0,
/* xor */ AXOR, C_REG, C_REG, 0,5, 4, OOP, 4, 0,
/* srl */ ASRL, C_REG, C_REG, 0,0, 4, OOP, 5, 0,
/* sra */ ASRA, C_REG, C_REG, 0,0, 4, OOP, 5, 0x20,
/* or */ AOR, C_REG, C_REG, 0,5, 4, OOP, 6, 0,
/* and */ AAND, C_REG, C_REG, 0,5, 4, OOP, 7, 0,
/* mul */ AMUL, C_REG, C_REG, 0,0, 4, OOP, 0, 0x01,
/* mulh */ AMULH, C_REG, C_REG, 0,0, 4, OOP, 1, 0x01,
/* mulhsu */ AMULHSU, C_REG, C_REG, 0,0, 4, OOP, 2, 0x01,
/* mulhu */ AMULHU, C_REG, C_REG, 0,0, 4, OOP, 3, 0x01,
/* div */ ADIV, C_REG, C_REG, 0,0, 4, OOP, 4, 0x01,
/* divu */ ADIVU, C_REG, C_REG, 0,0, 4, OOP, 5, 0x01,
/* rem */ AREM, C_REG, C_REG, 0,0, 4, OOP, 6, 0x01,
/* remu */ AREMU, C_REG, C_REG, 0,0, 4, OOP, 7, 0x01,
/* addw */ AADDW, C_REG, C_REG, 0,22, 4, OOP_32, 0, 0,
/* subw */ ASUBW, C_REG, C_REG, 0,22, 4, OOP_32, 0, 0x20,
/* sllw */ ASLLW, C_REG, C_REG, 0,0, 4, OOP_32, 1, 0,
/* srlw */ ASRLW, C_REG, C_REG, 0,0, 4, OOP_32, 5, 0,
/* sraw */ ASRAW, C_REG, C_REG, 0,0, 4, OOP_32, 5, 0x20,
/* mulw */ AMULW, C_REG, C_REG, 0,0, 4, OOP_32, 0, 0x01,
/* divw */ ADIVW, C_REG, C_REG, 0,0, 4, OOP_32, 4, 0x01,
/* divuw */ ADIVUW, C_REG, C_REG, 0,0, 4, OOP_32, 5, 0x01,
/* remw */ AREMW, C_REG, C_REG, 0,0, 4, OOP_32, 6, 0x01,
/* remuw */ AREMUW, C_REG, C_REG, 0,0, 4, OOP_32, 7, 0x01,
/* slli */ ASLL, C_SCON, C_REG, 1,8, 4, OOP_IMM, 1, 0,
/* srli */ ASRL, C_SCON, C_REG, 1,9, 4, OOP_IMM, 5, 0,
/* srai */ ASRA, C_SCON, C_REG, 1,9, 4, OOP_IMM, 5, 0x20,
/* addi */ AADD, C_SCON, C_REG, 2,10, 4, OOP_IMM, 0, 0,
/* slti */ ASLT, C_SCON, C_REG, 2,0, 4, OOP_IMM, 2, 0,
/* sltiu */ ASLTU, C_SCON, C_REG, 2,0, 4, OOP_IMM, 3, 0,
/* xori */ AXOR, C_SCON, C_REG, 2,0, 4, OOP_IMM, 4, 0,
/* ori */ AOR, C_SCON, C_REG, 2,0, 4, OOP_IMM, 6, 0,
/* andi */ AAND, C_SCON, C_REG, 2,13, 4, OOP_IMM, 7, 0,
/* addiw */ AADDW, C_SCON, C_REG, 2,23, 4, OOP_IMM_32, 0, 0,
/* slliw */ ASLLW, C_SCON, C_REG, 2,0, 4, OOP_IMM_32, 1, 0,
/* srliw */ ASRLW, C_SCON, C_REG, 2,0, 4, OOP_IMM_32, 5, 0,
/* sraiw */ ASRAW, C_SCON, C_REG, 2,0, 4, OOP_IMM_32, 5, 0x20,
/* beq */ ABEQ, C_REG, C_SBRA, 3,14, 4, OBRANCH, 0, 0,
/* bne */ ABNE, C_REG, C_SBRA, 3,15, 4, OBRANCH, 1, 0,
/* blt */ ABLT, C_REG, C_SBRA, 3,0, 4, OBRANCH, 4, 0,
/* bge */ ABGE, C_REG, C_SBRA, 3,0, 4, OBRANCH, 5, 0,
/* bltu */ ABLTU, C_REG, C_SBRA, 3,0, 4, OBRANCH, 6, 0,
/* bgeu */ ABGEU, C_REG, C_SBRA, 3,0, 4, OBRANCH, 7, 0,
/* jal */ AJAL, C_NONE, C_SBRA, 4,11, 4, OJAL, 0, REGLINK,
/* jal */ AJMP, C_NONE, C_SBRA, 4,12, 4, OJAL, 0, REGZERO,
/* jal */ AJAL, C_NONE, C_LBRA, 18,0, 8, OJALR, 0, REGLINK,
/* jal */ AJMP, C_NONE, C_LBRA, 18,0, 8, OJALR, 0, REGZERO,
/* jalr */ AJAL, C_NONE, C_SOREG, 5,3, 4, OJALR, 0, REGLINK,
/* jalr */ AJMP, C_NONE, C_SOREG, 5,4, 4, OJALR, 0, REGZERO,
/* sb */ AMOVB, C_ZREG, C_SOREG, 6,0, 4, OSTORE, 0, 0,
/* sb */ AMOVBU, C_ZREG, C_SOREG, 6,0, 4, OSTORE, 0, 0,
/* sh */ AMOVH, C_ZREG, C_SOREG, 6,0, 4, OSTORE, 1, 0,
/* sw */ AMOVW, C_ZREG, C_SOREG, 6,19, 4, OSTORE, 2, 0,
/* sd */ AMOV, C_ZREG, C_SOREG, 6,25, 4, OSTORE, 3, 0,
/* fsw */ AMOVF, C_FREG, C_SOREG, 6,20, 4, OSTORE_FP, 2, 0,
/* fsd */ AMOVD, C_FREG, C_SOREG, 6,21, 4, OSTORE_FP, 3, 0,
/* sb */ AMOVB, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 0, 0,
/* sb */ AMOVBU, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 0, 0,
/* sh */ AMOVH, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 1, 0,
/* sw */ AMOVW, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 2, 0,
/* sd */ AMOV, C_ZREG, C_LEXT, 12,0, 8, OSTORE, 3, 0,
/* fsw */ AMOVF, C_FREG, C_LEXT, 12,0, 8, OSTORE_FP, 2, 0,
/* fsd */ AMOVD, C_FREG, C_LEXT, 12,0, 8, OSTORE_FP, 3, 0,
/* sb */ AMOVB, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 0, 0,
/* sb */ AMOVBU, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 0, 0,
/* sh */ AMOVH, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 1, 0,
/* sw */ AMOVW, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 2, 0,
/* sd */ AMOV, C_ZREG, C_LOREG, 15,0, 12, OSTORE, 3, 0,
/* fsw */ AMOVF, C_FREG, C_LOREG, 15,0, 12, OSTORE_FP, 2, 0,
/* fsd */ AMOVD, C_FREG, C_LOREG, 15,0, 12, OSTORE_FP, 3, 0,
/* lb */ AMOVB, C_SOREG, C_REG, 7,0, 4, OLOAD, 0, 0,
/* lh */ AMOVH, C_SOREG, C_REG, 7,0, 4, OLOAD, 1, 0,
/* lw */ AMOVW, C_SOREG, C_REG, 7,16, 4, OLOAD, 2, 0,
/* ld */ AMOV, C_SOREG, C_REG, 7,24, 4, OLOAD, 3, 0,
/* lbu */ AMOVBU, C_SOREG, C_REG, 7,0, 4, OLOAD, 4, 0,
/* lhu */ AMOVHU, C_SOREG, C_REG, 7,0, 4, OLOAD, 5, 0,
/* lwu */ AMOVWU, C_SOREG, C_REG, 7,0, 4, OLOAD, 6, 0,
/* flw */ AMOVF, C_SOREG, C_FREG, 7,17, 4, OLOAD_FP, 2, 0,
/* fld */ AMOVD, C_SOREG, C_FREG, 7,18, 4, OLOAD_FP, 3, 0,
/* lui */ AMOV, C_UCON, C_REG, 8,7, 4, OLUI, 0, 0,
/* lb */ AMOVB, C_LEXT, C_REG, 13,0, 8, OLOAD, 0, 0,
/* lh */ AMOVH, C_LEXT, C_REG, 13,0, 8, OLOAD, 1, 0,
/* lw */ AMOVW, C_LEXT, C_REG, 13,0, 8, OLOAD, 2, 0,
/* ld */ AMOV, C_LEXT, C_REG, 13,0, 8, OLOAD, 3, 0,
/* lbu */ AMOVBU, C_LEXT, C_REG, 13,0, 8, OLOAD, 4, 0,
/* lhu */ AMOVHU, C_LEXT, C_REG, 13,0, 8, OLOAD, 5, 0,
/* lwu */ AMOVWU, C_LEXT, C_REG, 13,0, 8, OLOAD, 6, 0,
/* flw */ AMOVF, C_LEXT, C_FREG, 13,0, 8, OLOAD_FP, 2, 0,
/* fld */ AMOVD, C_LEXT, C_FREG, 13,0, 8, OLOAD_FP, 3, 0,
/* lb */ AMOVB, C_LOREG, C_REG, 16,0, 12, OLOAD, 0, 0,
/* lh */ AMOVH, C_LOREG, C_REG, 16,0, 12, OLOAD, 1, 0,
/* lw */ AMOVW, C_LOREG, C_REG, 16,0, 12, OLOAD, 2, 0,
/* ld */ AMOV, C_LOREG, C_REG, 16,0, 12, OLOAD, 3, 0,
/* lbu */ AMOVBU, C_LOREG, C_REG, 16,0, 12, OLOAD, 4, 0,
/* lhu */ AMOVHU, C_LOREG, C_REG, 16,0, 12, OLOAD, 5, 0,
/* lwu */ AMOVWU, C_LOREG, C_REG, 16,0, 12, OLOAD, 6, 0,
/* flw */ AMOVF, C_LOREG, C_FREG, 16,0, 12, OLOAD_FP, 2, 0,
/* fld */ AMOVD, C_LOREG, C_FREG, 16,0, 12, OLOAD_FP, 3, 0,
/* addi */ AMOVW, C_SCON, C_REG, 11,6, 4, OOP_IMM, 0, 0,
/* addi */ AMOVW, C_SECON, C_REG, 11,0, 4, OOP_IMM, 0, 0,
/* addi */ AMOVW, C_SACON, C_REG, 11,0, 4, OOP_IMM, 0, 0,
/* lui,addi */ AMOVW, C_LCON, C_REG, 9,0, 8, OOP_IMM, 0, 0,
/* lui,addi */ AMOVW, C_LECON, C_REG, 9,0, 8, OOP_IMM, 0, 0,
/* ",",add */ AMOVW, C_LACON, C_REG, 14,0, 12, OOP_IMM, 0, 0,
/* add */ AMOV, C_REG, C_REG, 0,2, 4, OOP, 0, 0,
/* addi */ AMOV, C_SCON, C_REG, 11,6, 4, OOP_IMM, 0, 0,
/* addi */ AMOV, C_SECON, C_REG, 11,0, 4, OOP_IMM, 0, 0,
/* addi */ AMOV, C_SACON, C_REG, 11,0, 4, OOP_IMM, 0, 0,
/* lui,addi */ AMOV, C_LCON, C_REG, 9,0, 8, OOP_IMM, 0, 0,
/* lui,addi */ AMOV, C_LECON, C_REG, 20,0, 8, OOP_IMM, 0, 0,
/* lui,s[rl]ai */ AMOV, C_VCON, C_REG, 21,0, 8, OOP_IMM, 5, 0x20,
/* ",",add */ AMOV, C_LACON, C_REG, 14,0, 12, OOP_IMM, 0, 0,
/* ",",add */ AADD, C_LCON, C_REG, 14,0, 12, OOP_IMM, 0, 0,
/* ",",and */ AAND, C_LCON, C_REG, 14,0, 12, OOP_IMM, 7, 0,
/* ",",or */ AOR, C_LCON, C_REG, 14,0, 12, OOP_IMM, 6, 0,
/* ",",xor */ AXOR, C_LCON, C_REG, 14,0, 12, OOP_IMM, 4, 0,
/* addiw */ AMOVW, C_REG, C_REG, 19,23, 4, OOP_IMM_32, 0, 0,
/* andi */ AMOVBU, C_ZREG, C_REG, 10,0, 4, OOP_IMM, 7, 0xFF,
/* slli,srli */ AMOVHU, C_ZREG, C_REG, 10,0, 8, OOP_IMM, 5, 16,
/* slli,srli */ AMOVWU, C_ZREG, C_REG, 10,0, 8, OOP_IMM, 5, 0,
/* slli,srai */ AMOVB, C_ZREG, C_REG, 10,0, 8, OOP_IMM, 5, 24+(0x20<<5),
/* slli,srai */ AMOVH, C_ZREG, C_REG, 10,0, 8, OOP_IMM, 5, 16+(0x20<<5),
ASYS, C_NONE, C_SCON, 24,0, 4, OSYSTEM, 0, 0,
ACSRRW, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 1, 0,
ACSRRS, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 2, 0,
ACSRRC, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 3, 0,
ACSRRWI, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 5, 0,
ACSRRSI, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 6, 0,
ACSRRCI, C_CTLREG, C_REG, 22,0, 4, OSYSTEM, 7, 0,
AADDF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x00,
ASUBF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x04,
AMULF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x08,
ADIVF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x0c,
AADDD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x01,
ASUBD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x05,
AMULD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x09,
ADIVD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x7, 0x0d,
ACMPEQF, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x2, 0x50,
ACMPLEF, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x0, 0x50,
ACMPLTF, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x1, 0x50,
ACMPEQD, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x2, 0x51,
ACMPLED, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x0, 0x51,
ACMPLTD, C_FREG, C_REG, 0,0, 4, OOP_FP, 0x1, 0x51,
/* float move */ AMOVF, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x0, 0x10,
/* dbl move */ AMOVD, C_FREG, C_FREG, 0,0, 4, OOP_FP, 0x0, 0x11,
/* float->dbl */ AMOVFD, C_FREG, C_FREG, 17,0, 4, OOP_FP, 0x0, 0x21,
/* dbl->float */ AMOVDF, C_FREG, C_FREG, 17,0, 4, OOP_FP, 0x1, 0x20,
/* float->int */ AMOVFW, C_FREG, C_REG, 17,0, 4, OOP_FP, 0x0, 0x60,
/* dbl->int */ AMOVDW, C_FREG, C_REG, 17,0, 4, OOP_FP, 0x0, 0x61,
/* int->float */ AMOVWF, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x0, 0x68,
/* uint->float */ AMOVUF, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x1, 0x68,
/* int->dbl */ AMOVWD, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x0, 0x69,
/* uint->dbl */ AMOVUD, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x1, 0x69,
/* float->vlong*/ AMOVFV, C_FREG, C_REG, 17,0, 4, OOP_FP, 0x2, 0x60,
/* dbl->vlong */ AMOVDV, C_FREG, C_REG, 17,0, 4, OOP_FP, 0x2, 0x61,
/* vlong->float*/ AMOVVF, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x2, 0x68,
/* uvlong->float*/ AMOVUVF, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x3, 0x68,
/* vlong->dbl */ AMOVVD, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x2, 0x69,
/* uvlong->dbl */ AMOVUVD, C_REG, C_FREG, 17,0, 4, OOP_FP, 0x3, 0x69,
/* - */ AWORD, C_NONE, C_LCON, 25,0, 4, 0, 0, 0,
/* - */ ATEXT, C_LEXT, C_LCON, 26,0, 0, 0, 0, 0,
/* - */ AXXX, C_NONE, C_NONE, 0,0, 0, 0, 0, 0,
};
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