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authorforsyth <forsyth@vitanuova.com>2010-04-27 12:51:13 +0100
committerforsyth <forsyth@vitanuova.com>2010-04-27 12:51:13 +0100
commitd67b7dad77bb8aa973dad1f7c3ab0c309b114278 (patch)
tree6794120fb327d6de19cf05eed53f80d877781a3e /utils/libmach/q.c
parent09da2e137d5eb0c940df35d989e4c31ec0654fc4 (diff)
20100427-1251
Diffstat (limited to 'utils/libmach/q.c')
-rw-r--r--utils/libmach/q.c161
1 files changed, 81 insertions, 80 deletions
diff --git a/utils/libmach/q.c b/utils/libmach/q.c
index 858882bf..f73ade9f 100644
--- a/utils/libmach/q.c
+++ b/utils/libmach/q.c
@@ -2,7 +2,7 @@
* PowerPC definition
* forsyth@terzarima.net
*/
-#include <lib9.h>
+#include <u.h>
#include <bio.h>
#include "uregq.h"
#include "mach.h"
@@ -17,84 +17,84 @@
#define R31 REGOFF(r31)
#define FP_REG(x) (R31+4+8*(x))
-#define REGSIZE sizeof(struct Ureg)
-#define FPREGSIZE (8*33)
+#define REGSIZE sizeof(struct Ureg)
+#define FPREGSIZE (8*33)
Reglist powerreglist[] = {
- {"CAUSE", REGOFF(cause), RINT|RRDONLY, 'X'},
- {"SRR1", REGOFF(status), RINT|RRDONLY, 'X'},
- {"PC", REGOFF(pc), RINT, 'X'},
- {"LR", REGOFF(lr), RINT, 'X'},
- {"CR", REGOFF(cr), RINT, 'X'},
- {"XER", REGOFF(xer), RINT, 'X'},
- {"CTR", REGOFF(ctr), RINT, 'X'},
- {"PC", PC, RINT, 'X'},
- {"SP", SP, RINT, 'X'},
- {"R0", REGOFF(r0), RINT, 'X'},
+ {"CAUSE", REGOFF(cause), RINT|RRDONLY, 'X'},
+ {"SRR1", REGOFF(srr1), RINT|RRDONLY, 'X'},
+ {"PC", REGOFF(pc), RINT, 'X'},
+ {"LR", REGOFF(lr), RINT, 'X'},
+ {"CR", REGOFF(cr), RINT, 'X'},
+ {"XER", REGOFF(xer), RINT, 'X'},
+ {"CTR", REGOFF(ctr), RINT, 'X'},
+ {"PC", PC, RINT, 'X'},
+ {"SP", SP, RINT, 'X'},
+ {"R0", REGOFF(r0), RINT, 'X'},
/* R1 is SP */
- {"R2", REGOFF(r2), RINT, 'X'},
- {"R3", REGOFF(r3), RINT, 'X'},
- {"R4", REGOFF(r4), RINT, 'X'},
- {"R5", REGOFF(r5), RINT, 'X'},
- {"R6", REGOFF(r6), RINT, 'X'},
- {"R7", REGOFF(r7), RINT, 'X'},
- {"R8", REGOFF(r8), RINT, 'X'},
- {"R9", REGOFF(r9), RINT, 'X'},
- {"R10", REGOFF(r10), RINT, 'X'},
- {"R11", REGOFF(r11), RINT, 'X'},
- {"R12", REGOFF(r12), RINT, 'X'},
- {"R13", REGOFF(r13), RINT, 'X'},
- {"R14", REGOFF(r14), RINT, 'X'},
- {"R15", REGOFF(r15), RINT, 'X'},
- {"R16", REGOFF(r16), RINT, 'X'},
- {"R17", REGOFF(r17), RINT, 'X'},
- {"R18", REGOFF(r18), RINT, 'X'},
- {"R19", REGOFF(r19), RINT, 'X'},
- {"R20", REGOFF(r20), RINT, 'X'},
- {"R21", REGOFF(r21), RINT, 'X'},
- {"R22", REGOFF(r22), RINT, 'X'},
- {"R23", REGOFF(r23), RINT, 'X'},
- {"R24", REGOFF(r24), RINT, 'X'},
- {"R25", REGOFF(r25), RINT, 'X'},
- {"R26", REGOFF(r26), RINT, 'X'},
- {"R27", REGOFF(r27), RINT, 'X'},
- {"R28", REGOFF(r28), RINT, 'X'},
- {"R29", REGOFF(r29), RINT, 'X'},
- {"R30", REGOFF(r30), RINT, 'X'},
- {"R31", REGOFF(r31), RINT, 'X'},
- {"F0", FP_REG(0), RFLT, 'D'},
- {"F1", FP_REG(1), RFLT, 'D'},
- {"F2", FP_REG(2), RFLT, 'D'},
- {"F3", FP_REG(3), RFLT, 'D'},
- {"F4", FP_REG(4), RFLT, 'D'},
- {"F5", FP_REG(5), RFLT, 'D'},
- {"F6", FP_REG(6), RFLT, 'D'},
- {"F7", FP_REG(7), RFLT, 'D'},
- {"F8", FP_REG(8), RFLT, 'D'},
- {"F9", FP_REG(9), RFLT, 'D'},
- {"F10", FP_REG(10), RFLT, 'D'},
- {"F11", FP_REG(11), RFLT, 'D'},
- {"F12", FP_REG(12), RFLT, 'D'},
- {"F13", FP_REG(13), RFLT, 'D'},
- {"F14", FP_REG(14), RFLT, 'D'},
- {"F15", FP_REG(15), RFLT, 'D'},
- {"F16", FP_REG(16), RFLT, 'D'},
- {"F17", FP_REG(17), RFLT, 'D'},
- {"F18", FP_REG(18), RFLT, 'D'},
- {"F19", FP_REG(19), RFLT, 'D'},
- {"F20", FP_REG(20), RFLT, 'D'},
- {"F21", FP_REG(21), RFLT, 'D'},
- {"F22", FP_REG(22), RFLT, 'D'},
- {"F23", FP_REG(23), RFLT, 'D'},
- {"F24", FP_REG(24), RFLT, 'D'},
- {"F25", FP_REG(25), RFLT, 'D'},
- {"F26", FP_REG(26), RFLT, 'D'},
- {"F27", FP_REG(27), RFLT, 'D'},
- {"F28", FP_REG(28), RFLT, 'D'},
- {"F29", FP_REG(29), RFLT, 'D'},
- {"F30", FP_REG(30), RFLT, 'D'},
- {"F31", FP_REG(31), RFLT, 'D'},
- {"FPSCR", FP_REG(32)+4, RFLT, 'X'},
+ {"R2", REGOFF(r2), RINT, 'X'},
+ {"R3", REGOFF(r3), RINT, 'X'},
+ {"R4", REGOFF(r4), RINT, 'X'},
+ {"R5", REGOFF(r5), RINT, 'X'},
+ {"R6", REGOFF(r6), RINT, 'X'},
+ {"R7", REGOFF(r7), RINT, 'X'},
+ {"R8", REGOFF(r8), RINT, 'X'},
+ {"R9", REGOFF(r9), RINT, 'X'},
+ {"R10", REGOFF(r10), RINT, 'X'},
+ {"R11", REGOFF(r11), RINT, 'X'},
+ {"R12", REGOFF(r12), RINT, 'X'},
+ {"R13", REGOFF(r13), RINT, 'X'},
+ {"R14", REGOFF(r14), RINT, 'X'},
+ {"R15", REGOFF(r15), RINT, 'X'},
+ {"R16", REGOFF(r16), RINT, 'X'},
+ {"R17", REGOFF(r17), RINT, 'X'},
+ {"R18", REGOFF(r18), RINT, 'X'},
+ {"R19", REGOFF(r19), RINT, 'X'},
+ {"R20", REGOFF(r20), RINT, 'X'},
+ {"R21", REGOFF(r21), RINT, 'X'},
+ {"R22", REGOFF(r22), RINT, 'X'},
+ {"R23", REGOFF(r23), RINT, 'X'},
+ {"R24", REGOFF(r24), RINT, 'X'},
+ {"R25", REGOFF(r25), RINT, 'X'},
+ {"R26", REGOFF(r26), RINT, 'X'},
+ {"R27", REGOFF(r27), RINT, 'X'},
+ {"R28", REGOFF(r28), RINT, 'X'},
+ {"R29", REGOFF(r29), RINT, 'X'},
+ {"R30", REGOFF(r30), RINT, 'X'},
+ {"R31", REGOFF(r31), RINT, 'X'},
+ {"F0", FP_REG(0), RFLT, 'F'},
+ {"F1", FP_REG(1), RFLT, 'F'},
+ {"F2", FP_REG(2), RFLT, 'F'},
+ {"F3", FP_REG(3), RFLT, 'F'},
+ {"F4", FP_REG(4), RFLT, 'F'},
+ {"F5", FP_REG(5), RFLT, 'F'},
+ {"F6", FP_REG(6), RFLT, 'F'},
+ {"F7", FP_REG(7), RFLT, 'F'},
+ {"F8", FP_REG(8), RFLT, 'F'},
+ {"F9", FP_REG(9), RFLT, 'F'},
+ {"F10", FP_REG(10), RFLT, 'F'},
+ {"F11", FP_REG(11), RFLT, 'F'},
+ {"F12", FP_REG(12), RFLT, 'F'},
+ {"F13", FP_REG(13), RFLT, 'F'},
+ {"F14", FP_REG(14), RFLT, 'F'},
+ {"F15", FP_REG(15), RFLT, 'F'},
+ {"F16", FP_REG(16), RFLT, 'F'},
+ {"F17", FP_REG(17), RFLT, 'F'},
+ {"F18", FP_REG(18), RFLT, 'F'},
+ {"F19", FP_REG(19), RFLT, 'F'},
+ {"F20", FP_REG(20), RFLT, 'F'},
+ {"F21", FP_REG(21), RFLT, 'F'},
+ {"F22", FP_REG(22), RFLT, 'F'},
+ {"F23", FP_REG(23), RFLT, 'F'},
+ {"F24", FP_REG(24), RFLT, 'F'},
+ {"F25", FP_REG(25), RFLT, 'F'},
+ {"F26", FP_REG(26), RFLT, 'F'},
+ {"F27", FP_REG(27), RFLT, 'F'},
+ {"F28", FP_REG(28), RFLT, 'F'},
+ {"F29", FP_REG(29), RFLT, 'F'},
+ {"F30", FP_REG(30), RFLT, 'F'},
+ {"F31", FP_REG(31), RFLT, 'F'},
+ {"FPSCR", FP_REG(32)+4, RFLT, 'X'},
{ 0 }
};
@@ -104,16 +104,17 @@ Mach mpower =
"power",
MPOWER, /* machine type */
powerreglist, /* register set */
- REGSIZE, /* register set size in bytes */
- FPREGSIZE, /* floating point register size in bytes */
+ REGSIZE, /* number of bytes in register set */
+ FPREGSIZE, /* number of bytes in FP register set */
"PC", /* name of PC */
"SP", /* name of SP */
"LR", /* name of link register */
"setSB", /* static base register name */
0, /* value */
0x1000, /* page size */
- 0x20000000, /* kernel base */
- 0, /* kernel text mask */
+ 0x80000000ULL, /* kernel base */
+ 0xF0000000ULL, /* kernel text mask */
+ 0x7FFFFFFFULL, /* user stack top */
4, /* quantization of pc */
4, /* szaddr */
4, /* szreg */