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authorCharles.Forsyth <devnull@localhost>2006-12-22 21:39:35 +0000
committerCharles.Forsyth <devnull@localhost>2006-12-22 21:39:35 +0000
commit74a4d8c26dd3c1e9febcb717cfd6cb6512991a7a (patch)
treec6e220ba61db3a6ea4052e6841296d829654e664 /os/cerf250/uart.h
parent46439007cf417cbd9ac8049bb4122c890097a0fa (diff)
20060303
Diffstat (limited to 'os/cerf250/uart.h')
-rw-r--r--os/cerf250/uart.h118
1 files changed, 118 insertions, 0 deletions
diff --git a/os/cerf250/uart.h b/os/cerf250/uart.h
new file mode 100644
index 00000000..77493daa
--- /dev/null
+++ b/os/cerf250/uart.h
@@ -0,0 +1,118 @@
+/*
+ * PXA250 specific code for its uart.
+ */
+
+#define UR(p,r) ((ulong*)(p))[r]
+#define uartwr(u,r,v) (UR(u->regs,r) = (v))
+#define uartwrreg(u,r,v) (UR(u->regs,r)= (u)->sticky[r] | (v))
+#define uartrdreg(u,r) UR(u->regs,r)
+
+extern void uartsetup(ulong, void*, ulong, char*);
+extern void uartclock(void);
+
+static void
+uartportpower(Uart *p, int on)
+{
+ /* TO DO: power control */
+ if(on)
+ p->sticky[Iena] |= Uue;
+ else
+ p->sticky[Iena] &= ~Uue;
+ uartwrreg(p, Iena, 0);
+}
+
+/*
+ * handle an interrupt to a single uart
+ */
+static void
+uartintrx(Ureg*, void* arg)
+{
+ uartintr(arg);
+}
+
+/*
+ * install the uarts (called by reset)
+ */
+void
+uartinstall(void)
+{
+ static int already;
+
+ if(already)
+ return;
+ already = 1;
+
+ /* first two ports are always there */
+ uartsetup(0, (void*)PHYSUART0, 0, "eia0"); /* full function */
+ intrenable(IRQ, IRQffuart, uartintrx, uart[0], "uart0");
+ uartsetup(2, (void*)PHYSUART2, 0, "eia2"); /* hardware uart */
+ intrenable(IRQ, IRQhwuart, uartintrx, uart[1], "uart2");
+ addclock0link(uartclock, 22);
+}
+
+/*
+ * If the UART's receiver can be connected to a DMA channel,
+ * this function does what is necessary to create the
+ * connection and returns the DMA channel number.
+ * If the UART's receiver cannot be connected to a DMA channel,
+ * a -1 is returned.
+ */
+char
+uartdmarcv(int dev)
+{
+
+ USED(dev);
+ return -1;
+}
+
+void
+uartdebuginit(void)
+{
+ ulong *p;
+
+ p = (ulong*)PHYSUART0;
+ p[Iena] = Uue;
+ p[Format] = Dra;
+ p[Dmsb] = 0;
+ p[Dlsb] = 24;
+ p[Format] = Bits8;
+}
+
+void
+uartputc(int c)
+{
+ ulong *p;
+
+ if(c == 0)
+ return;
+ p = (ulong*)PHYSUART0;
+ while((UR(p,Lstat) & Outready) == 0){
+ ;
+ }
+ UR(p,Data) = c;
+ if(c == '\n')
+ while((UR(p,Lstat) & Outready) == 0){ /* let fifo drain */
+ ;
+ }
+}
+
+void
+uartputs(char *data, int len)
+{
+ int s;
+
+// if(!uartspcl && !redirectconsole)
+// return;
+ s = splhi();
+ while(--len >= 0){
+ if(*data == '\n')
+ uartputc('\r');
+ uartputc(*data++);
+ }
+ splx(s);
+}
+
+void
+uartwait(void)
+{
+}