20060303a

3 files changed, 541 insertions, 0 deletions

diff --git a/libsec/Inferno-mips/md5block.s b/libsec/Inferno-mips/md5block.s
new file mode 100644
index 00000000..eb7b49ff
--- /dev/null
+++ b/libsec/Inferno-mips/md5block.s
@@ -0,0 +1,305 @@
+/*
+ *  rfc1321 requires that I include this.  The code is new.  The constants
+ *  all come from the rfc (hence the copyright).  We trade a table for the
+ *  macros in rfc.  The total size is a lot less. -- presotto
+ *
+ *	Copyright (C) 1991-2, RSA Data Security, Inc. Created 1991. All
+ *	rights reserved.
+ *
+ *	License to copy and use this software is granted provided that it
+ *	is identified as the "RSA Data Security, Inc. MD5 Message-Digest
+ *	Algorithm" in all material mentioning or referencing this software
+ *	or this function.
+ *
+ *	License is also granted to make and use derivative works provided
+ *	that such works are identified as "derived from the RSA Data
+ *	Security, Inc. MD5 Message-Digest Algorithm" in all material
+ *	mentioning or referencing the derived work.
+ *
+ *	RSA Data Security, Inc. makes no representations concerning either
+ *	the merchantability of this software or the suitability of this
+ *	software forany particular purpose. It is provided "as is"
+ *	without express or implied warranty of any kind.
+ *	These notices must be retained in any copies of any part of this
+ *	documentation and/or software.
+ */
+
+	/* round 1 */
+	DATA	md5tab<>+( 0*4)(SB)/4,$0xd76aa478	
+	DATA	md5tab<>+( 1*4)(SB)/4,$0xe8c7b756	
+	DATA	md5tab<>+( 2*4)(SB)/4,$0x242070db	
+	DATA	md5tab<>+( 3*4)(SB)/4,$0xc1bdceee	
+	DATA	md5tab<>+( 4*4)(SB)/4,$0xf57c0faf	
+	DATA	md5tab<>+( 5*4)(SB)/4,$0x4787c62a	
+	DATA	md5tab<>+( 6*4)(SB)/4,$0xa8304613	
+	DATA	md5tab<>+( 7*4)(SB)/4,$0xfd469501	
+	DATA	md5tab<>+( 8*4)(SB)/4,$0x698098d8	
+	DATA	md5tab<>+( 9*4)(SB)/4,$0x8b44f7af	
+	DATA	md5tab<>+(10*4)(SB)/4,$0xffff5bb1	
+	DATA	md5tab<>+(11*4)(SB)/4,$0x895cd7be	
+	DATA	md5tab<>+(12*4)(SB)/4,$0x6b901122	
+	DATA	md5tab<>+(13*4)(SB)/4,$0xfd987193	
+	DATA	md5tab<>+(14*4)(SB)/4,$0xa679438e	
+	DATA	md5tab<>+(15*4)(SB)/4,$0x49b40821
+
+	/* round 2 */
+	DATA	md5tab<>+(16*4)(SB)/4,$0xf61e2562	
+	DATA	md5tab<>+(17*4)(SB)/4,$0xc040b340	
+	DATA	md5tab<>+(18*4)(SB)/4,$0x265e5a51	
+	DATA	md5tab<>+(19*4)(SB)/4,$0xe9b6c7aa	
+	DATA	md5tab<>+(20*4)(SB)/4,$0xd62f105d	
+	DATA	md5tab<>+(21*4)(SB)/4,$0x02441453	
+	DATA	md5tab<>+(22*4)(SB)/4,$0xd8a1e681	
+	DATA	md5tab<>+(23*4)(SB)/4,$0xe7d3fbc8	
+	DATA	md5tab<>+(24*4)(SB)/4,$0x21e1cde6	
+	DATA	md5tab<>+(25*4)(SB)/4,$0xc33707d6	
+	DATA	md5tab<>+(26*4)(SB)/4,$0xf4d50d87	
+	DATA	md5tab<>+(27*4)(SB)/4,$0x455a14ed	
+	DATA	md5tab<>+(28*4)(SB)/4,$0xa9e3e905	
+	DATA	md5tab<>+(29*4)(SB)/4,$0xfcefa3f8	
+	DATA	md5tab<>+(30*4)(SB)/4,$0x676f02d9	
+	DATA	md5tab<>+(31*4)(SB)/4,$0x8d2a4c8a
+
+	/* round 3 */
+	DATA	md5tab<>+(32*4)(SB)/4,$0xfffa3942	
+	DATA	md5tab<>+(33*4)(SB)/4,$0x8771f681	
+	DATA	md5tab<>+(34*4)(SB)/4,$0x6d9d6122	
+	DATA	md5tab<>+(35*4)(SB)/4,$0xfde5380c	
+	DATA	md5tab<>+(36*4)(SB)/4,$0xa4beea44	
+	DATA	md5tab<>+(37*4)(SB)/4,$0x4bdecfa9	
+	DATA	md5tab<>+(38*4)(SB)/4,$0xf6bb4b60	
+	DATA	md5tab<>+(39*4)(SB)/4,$0xbebfbc70	
+	DATA	md5tab<>+(40*4)(SB)/4,$0x289b7ec6	
+	DATA	md5tab<>+(41*4)(SB)/4,$0xeaa127fa	
+	DATA	md5tab<>+(42*4)(SB)/4,$0xd4ef3085	
+	DATA	md5tab<>+(43*4)(SB)/4,$0x04881d05	
+	DATA	md5tab<>+(44*4)(SB)/4,$0xd9d4d039	
+	DATA	md5tab<>+(45*4)(SB)/4,$0xe6db99e5	
+	DATA	md5tab<>+(46*4)(SB)/4,$0x1fa27cf8	
+	DATA	md5tab<>+(47*4)(SB)/4,$0xc4ac5665	
+
+	/* round 4 */
+	DATA	md5tab<>+(48*4)(SB)/4,$0xf4292244	
+	DATA	md5tab<>+(49*4)(SB)/4,$0x432aff97	
+	DATA	md5tab<>+(50*4)(SB)/4,$0xab9423a7	
+	DATA	md5tab<>+(51*4)(SB)/4,$0xfc93a039	
+	DATA	md5tab<>+(52*4)(SB)/4,$0x655b59c3	
+	DATA	md5tab<>+(53*4)(SB)/4,$0x8f0ccc92	
+	DATA	md5tab<>+(54*4)(SB)/4,$0xffeff47d	
+	DATA	md5tab<>+(55*4)(SB)/4,$0x85845dd1	
+	DATA	md5tab<>+(56*4)(SB)/4,$0x6fa87e4f	
+	DATA	md5tab<>+(57*4)(SB)/4,$0xfe2ce6e0	
+	DATA	md5tab<>+(58*4)(SB)/4,$0xa3014314	
+	DATA	md5tab<>+(59*4)(SB)/4,$0x4e0811a1	
+	DATA	md5tab<>+(60*4)(SB)/4,$0xf7537e82	
+	DATA	md5tab<>+(61*4)(SB)/4,$0xbd3af235	
+	DATA	md5tab<>+(62*4)(SB)/4,$0x2ad7d2bb	
+	DATA	md5tab<>+(63*4)(SB)/4,$0xeb86d391
+
+#define S11 7
+#define S12 12
+#define S13 17
+#define S14 22
+
+#define S21 5
+#define S22 9
+#define S23 14
+#define S24 20
+
+#define S31 4
+#define S32 11
+#define S33 16
+#define S34 23
+
+#define S41 6
+#define S42 10
+#define S43 15
+#define S44 21
+
+#define	AREG		R5
+#define BREG		R6
+#define CREG		R7
+#define DREG		R8
+#define DATAREG		R1
+#define TABREG		R10
+#define STREG		R11
+#define XREG		R12
+#define ELOOPREG	R13
+#define EDREG		R14
+#define IREG		R15
+
+#define TMP1		R9
+#define TMP2		R2
+#define TMP3		R3
+#define TMP4		R4
+
+/*
+ * decode little endian data into x[off], then the body
+ * bodies have this form:
+ *	a += FN(B,C,D);
+ *	a += x[off] + t[off];
+ *	a = (a << S11) | (a >> (32 - S11));
+ *	a += b;
+ */
+#define BODY1(off,FN,SH,A,B,C,D)\
+	MOVBU off(DATAREG),TMP2;\
+	MOVBU (off+1)(DATAREG),TMP3;\
+	MOVBU (off+2)(DATAREG),TMP1;\
+	MOVBU (off+3)(DATAREG),TMP4;\
+	SLL $8,TMP3;\
+	OR TMP3,TMP2;\
+	SLL $16,TMP1;\
+	OR TMP1,TMP2;\
+	SLL $24,TMP4;\
+	OR TMP4,TMP2;\
+	MOVW off(TABREG),TMP3;\
+	FN(B,C,D)\
+	ADDU TMP1,A;\
+	MOVW TMP2,off(XREG);\
+	ADDU TMP2,A;\
+	ADDU TMP3,A;\
+	SLL $SH,A,TMP1;\
+	SRL $(32-SH),A;\
+	OR TMP1,A;\
+	ADDU B,A;\
+
+#define BODY(off,inc,FN,SH,A,B,C,D)\
+	MOVW off(TABREG),TMP3;\
+	ADDU XREG,IREG,TMP4;\
+	MOVW (TMP4),TMP2;\
+	ADDU $(inc*4),IREG;\
+	AND $63,IREG;\
+	FN(B,C,D)\
+	ADDU TMP1,A;\
+	ADDU TMP2,A;\
+	ADDU TMP3,A;\
+	SLL $SH,A,TMP1;\
+	SRL $(32-SH),A;\
+	OR  TMP1,A;\
+	ADDU B,A;\
+
+/*
+ * fn1 = ((c ^ d) & b) ^ d
+ */
+#define FN1(B,C,D)\
+	XOR C,D,TMP1;\
+	AND B,TMP1;\
+	XOR D,TMP1;\
+
+/*
+ * fn2 = ((b ^ c) & d) ^ c;
+ */
+#define FN2(B,C,D)\
+	XOR B,C,TMP1;\
+	AND D,TMP1;\
+	XOR C,TMP1;\
+
+/*
+ * fn3 = b ^ c ^ d;
+ */
+#define FN3(B,C,D)\
+	XOR B,C,TMP1;\
+	XOR D,TMP1;\
+
+/*
+ * fn4 = c ^ (b | ~d);
+ */
+#define FN4(B,C,D)\
+	XOR $-1,D,TMP1;\
+	OR B,TMP1;\
+	XOR C,TMP1;\
+
+#define	DATA	0
+#define	LEN	4
+#define	STATE	8
+
+#define XOFF	(-4-16*4)
+
+	TEXT	_md5block+0(SB),$68
+
+	MOVW	len+LEN(FP),TMP1
+	ADDU	DATAREG,TMP1,EDREG
+	MOVW	state+STATE(FP),STREG
+
+	MOVW 0(STREG),AREG
+	MOVW 4(STREG),BREG
+	MOVW 8(STREG),CREG
+	MOVW 12(STREG),DREG
+
+mainloop:
+
+	MOVW $md5tab<>+0(SB),TABREG
+	ADDU $(16*4),DATAREG,ELOOPREG
+	MOVW $x+XOFF(SP),XREG
+
+loop1:
+	BODY1(0,FN1,S11,AREG,BREG,CREG,DREG)
+	BODY1(4,FN1,S12,DREG,AREG,BREG,CREG)
+	BODY1(8,FN1,S13,CREG,DREG,AREG,BREG)
+	BODY1(12,FN1,S14,BREG,CREG,DREG,AREG)
+
+	ADDU $16,DATAREG
+	ADDU $16,TABREG
+	ADDU $16,XREG
+
+	BNE DATAREG,ELOOPREG,loop1
+
+
+	MOVW $x+XOFF(SP),XREG
+	MOVW $(1*4),IREG
+	MOVW $(1*4),ELOOPREG
+loop2:
+	BODY(0,5,FN2,S21,AREG,BREG,CREG,DREG)
+	BODY(4,5,FN2,S22,DREG,AREG,BREG,CREG)
+	BODY(8,5,FN2,S23,CREG,DREG,AREG,BREG)
+	BODY(12,5,FN2,S24,BREG,CREG,DREG,AREG)
+
+	ADDU $16,TABREG
+
+	BNE IREG,ELOOPREG,loop2
+
+
+	MOVW $(5*4),IREG
+	MOVW $(5*4),ELOOPREG
+loop3:
+	BODY(0,3,FN3,S31,AREG,BREG,CREG,DREG)
+	BODY(4,3,FN3,S32,DREG,AREG,BREG,CREG)
+	BODY(8,3,FN3,S33,CREG,DREG,AREG,BREG)
+	BODY(12,3,FN3,S34,BREG,CREG,DREG,AREG)
+
+	ADDU $16,TABREG
+
+	BNE IREG,ELOOPREG,loop3
+
+
+	MOVW $0,IREG
+loop4:
+	BODY(0,7,FN4,S41,AREG,BREG,CREG,DREG)
+	BODY(4,7,FN4,S42,DREG,AREG,BREG,CREG)
+	BODY(8,7,FN4,S43,CREG,DREG,AREG,BREG)
+	BODY(12,7,FN4,S44,BREG,CREG,DREG,AREG)
+
+	ADDU $16,TABREG
+
+	BNE IREG,R0,loop4
+
+	MOVW 0(STREG),TMP1
+	MOVW 4(STREG),TMP2
+	MOVW 8(STREG),TMP3
+	MOVW 12(STREG),TMP4
+	ADDU TMP1,AREG
+	ADDU TMP2,BREG
+	ADDU TMP3,CREG
+	ADDU TMP4,DREG
+	MOVW AREG,0(STREG)
+	MOVW BREG,4(STREG)
+	MOVW CREG,8(STREG)
+	MOVW DREG,12(STREG)
+
+	BNE DATAREG,EDREG,mainloop
+
+	RET
+
+	GLOBL	md5tab<>+0(SB),$256
+
+	END
diff --git a/libsec/Inferno-mips/mkfile b/libsec/Inferno-mips/mkfile
new file mode 100644
index 00000000..a929127b
--- /dev/null
+++ b/libsec/Inferno-mips/mkfile
@@ -0,0 +1,16 @@
+objtype=mips
+OBJTYPE=$objtype
+<../../mkconfig
+
+LIB=libsec.a
+FILES=\
+	md5block\
+	sha1block\
+
+HFILES=$ROOT/include/libsec.h
+
+SFILES=${FILES:%=%.s}
+
+OFILES=${FILES:%=%.$O}
+
+<$ROOT/mkfiles/mksyslib-$SHELLTYPE
diff --git a/libsec/Inferno-mips/sha1block.s b/libsec/Inferno-mips/sha1block.s
new file mode 100644
index 00000000..a4262faf
--- /dev/null
+++ b/libsec/Inferno-mips/sha1block.s
@@ -0,0 +1,220 @@
+	TEXT	_sha1block+0(SB),$328
+
+/*
+ * wp[off] = x;
+ * x += A <<< 5;
+ * E += 0xca62c1d6 + x;
+ * x = FN(B,C,D);
+ * E += x;
+ * B >>> 2
+ */
+#define BODYX(off,FN,V,A,B,C,D,E)\
+	FN(B,C,D)\
+	ADDU TMP1,E;\
+	ADDU V,E;\
+	MOVW TMP2,off(WREG);\
+	ADDU TMP2,E;\
+	SLL $5,A,TMP3;\
+	SRL $27,A,TMP4;\
+	OR TMP3,TMP4;\
+	ADDU TMP4,E;\
+	SLL $30,B,TMP4;\
+	SRL $2,B;\
+	OR TMP4,B
+
+/*
+ * x = data[i]
+ * BODYX
+ */
+#define BODY1(off,FN,V,A,B,C,D,E)\
+	MOVBU off(DATAREG),TMP2;\
+	MOVBU (off+1)(DATAREG),TMP3;\
+	MOVBU (off+2)(DATAREG),TMP1;\
+	MOVBU (off+3)(DATAREG),TMP4;\
+	SLL $24,TMP2;\
+	SLL $16,TMP3;\
+	OR TMP3,TMP2;\
+	SLL $8,TMP1;\
+	OR TMP1,TMP2;\
+	OR TMP4,TMP2;\
+	BODYX(off,FN,V,A,B,C,D,E)
+
+/*
+ * x = (wp[off-3] ^ wp[off-8] ^ wp[off-14] ^ wp[off-16]) <<< 1;
+ * BODYX
+ */
+#define BODY(off,FN,V,A,B,C,D,E)\
+	MOVW (off-64)(WREG),TMP1;\
+	MOVW (off-56)(WREG),TMP2;\
+	MOVW (off-32)(WREG),TMP3;\
+	MOVW (off-12)(WREG),TMP4;\
+	XOR TMP1,TMP2;\
+	XOR TMP3,TMP2;\
+	XOR TMP4,TMP2;\
+	SLL $1,TMP2,TMP1;\
+	SRL $31,TMP2;\
+	OR TMP1,TMP2;\
+	BODYX(off,FN,V,A,B,C,D,E)
+
+/*
+ * fn1 = (((C^D)&B)^D);
+ */
+#define FN1(B,C,D)\
+	XOR C,D,TMP1;\
+	AND B,TMP1;\
+	XOR D,TMP1;
+
+/*
+ * fn24 = B ^ C ^ D
+ */
+#define FN24(B,C,D)\
+	XOR B,C,TMP1;\
+	XOR D,TMP1;
+
+/*
+ * fn3 = ((B ^ C) & (D ^ B)) ^ B
+ */
+#define FN3(B,C,D)\
+	XOR B,C,TMP1;\
+	XOR B,D,TMP4;\
+	AND TMP4,TMP1;\
+	XOR B,TMP1;
+
+/*
+ * stack offsets
+ * void vtSha1Block(ulong *STATE, uchar *DATA, int LEN)
+ */
+#define	DATA	0
+#define	LEN	4
+#define	STATE	8
+
+/*
+ * stack offsets for locals
+ * ulong w[80];
+ * uchar *edata;
+ * ulong *w15, *w40, *w60, *w80;
+ * register local
+ * ulong *wp = BP
+ * ulong a = eax, b = ebx, c = ecx, d = edx, e = esi
+ * ulong tmp = edi
+ */
+#define WARRAY	(-4-(80*4))
+
+#define	AREG		R5
+#define BREG		R6
+#define CREG		R7
+#define DREG		R8
+#define EREG		R9
+#define DATAREG		R1
+#define STREG		R11
+#define WREG		R12
+#define W15REG		R13
+#define W60REG		R14
+#define W40REG		R15
+#define W80REG		R16
+#define EDREG		R17
+#define VREG		R18
+
+#define TMP1		R10
+#define TMP2		R2
+#define TMP3		R3
+#define TMP4		R4
+#define TMP5		R19
+
+	MOVW len+LEN(FP),TMP1
+	MOVW state+STATE(FP),STREG
+	ADDU DATAREG,TMP1,EDREG
+
+	MOVW 0(STREG),AREG
+	MOVW 4(STREG),BREG
+	MOVW 8(STREG),CREG
+	MOVW 12(STREG),DREG
+	MOVW 16(STREG),EREG
+
+	MOVW $warray+WARRAY(SP),WREG
+	ADDU $(15*4),WREG,W15REG
+	ADDU $(40*4),WREG,W40REG
+	ADDU $(60*4),WREG,W60REG
+	ADDU $(80*4),WREG,W80REG
+
+mainloop:
+	MOVW $warray+WARRAY(SP),WREG
+
+	MOVW $0x5a827999,VREG
+loop1:
+	BODY1(0,FN1,VREG,AREG,BREG,CREG,DREG,EREG)
+	BODY1(4,FN1,VREG,EREG,AREG,BREG,CREG,DREG)
+	BODY1(8,FN1,VREG,DREG,EREG,AREG,BREG,CREG)
+	BODY1(12,FN1,VREG,CREG,DREG,EREG,AREG,BREG)
+	BODY1(16,FN1,VREG,BREG,CREG,DREG,EREG,AREG)
+
+	ADDU $20,DATAREG
+	ADDU $20,WREG
+	BNE WREG,W15REG,loop1
+
+	BODY1(0,FN1,VREG,AREG,BREG,CREG,DREG,EREG)
+	ADDU $4,DATAREG
+
+	BODY(4,FN1,VREG,EREG,AREG,BREG,CREG,DREG)
+	BODY(8,FN1,VREG,DREG,EREG,AREG,BREG,CREG)
+	BODY(12,FN1,VREG,CREG,DREG,EREG,AREG,BREG)
+	BODY(16,FN1,VREG,BREG,CREG,DREG,EREG,AREG)
+
+	ADDU $20,WREG
+
+	MOVW $0x6ed9eba1,VREG
+loop2:
+	BODY(0,FN24,VREG,AREG,BREG,CREG,DREG,EREG)
+	BODY(4,FN24,VREG,EREG,AREG,BREG,CREG,DREG)
+	BODY(8,FN24,VREG,DREG,EREG,AREG,BREG,CREG)
+	BODY(12,FN24,VREG,CREG,DREG,EREG,AREG,BREG)
+	BODY(16,FN24,VREG,BREG,CREG,DREG,EREG,AREG)
+
+	ADDU $20,WREG
+	BNE WREG,W40REG,loop2
+
+	MOVW $0x8f1bbcdc,VREG
+loop3:
+	BODY(0,FN3,VREG,AREG,BREG,CREG,DREG,EREG)
+	BODY(4,FN3,VREG,EREG,AREG,BREG,CREG,DREG)
+	BODY(8,FN3,VREG,DREG,EREG,AREG,BREG,CREG)
+	BODY(12,FN3,VREG,CREG,DREG,EREG,AREG,BREG)
+	BODY(16,FN3,VREG,BREG,CREG,DREG,EREG,AREG)
+
+	ADDU $20,WREG
+	BNE WREG,W60REG,loop3
+
+	MOVW $0xca62c1d6,VREG
+loop4:
+	BODY(0,FN24,VREG,AREG,BREG,CREG,DREG,EREG)
+	BODY(4,FN24,VREG,EREG,AREG,BREG,CREG,DREG)
+	BODY(8,FN24,VREG,DREG,EREG,AREG,BREG,CREG)
+	BODY(12,FN24,VREG,CREG,DREG,EREG,AREG,BREG)
+	BODY(16,FN24,VREG,BREG,CREG,DREG,EREG,AREG)
+
+	ADDU $20,WREG
+	BNE WREG,W80REG,loop4
+
+	MOVW 0(STREG),TMP1
+	MOVW 4(STREG),TMP2
+	MOVW 8(STREG),TMP3
+	MOVW 12(STREG),TMP4
+	MOVW 16(STREG),TMP5
+
+	ADDU TMP1,AREG
+	ADDU TMP2,BREG
+	ADDU TMP3,CREG
+	ADDU TMP4,DREG
+	ADDU TMP5,EREG
+
+	MOVW AREG,0(STREG)
+	MOVW BREG,4(STREG)
+	MOVW CREG,8(STREG)
+	MOVW DREG,12(STREG)
+	MOVW EREG,16(STREG)
+
+	BNE DATAREG,EDREG,mainloop
+
+	RET
+
+	END