From 37da2899f40661e3e9631e497da8dc59b971cbd0 Mon Sep 17 00:00:00 2001
From: "Charles.Forsyth" <devnull@localhost>
Date: Fri, 22 Dec 2006 17:07:39 +0000
Subject: 20060303a

---
 Solaris/sparc/include/fpuctl.h | 75 ++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 75 insertions(+)
 create mode 100644 Solaris/sparc/include/fpuctl.h

(limited to 'Solaris/sparc/include/fpuctl.h')

diff --git a/Solaris/sparc/include/fpuctl.h b/Solaris/sparc/include/fpuctl.h
new file mode 100644
index 00000000..e91ee09b
--- /dev/null
+++ b/Solaris/sparc/include/fpuctl.h
@@ -0,0 +1,75 @@
+/* This code is a little awkward.  If somebody who understands Solaris
+   better would tell me an idiomatic way to invoke equivalent
+   behavior, I'd be grateful.    ehg@bell-labs.com  */
+
+/*
+ * accrued exception bits in the fsr
+ */
+#define FPAINEX		(1<<5)
+#define FPAOVFL		(1<<8)
+#define	FPAUNFL		(1<<7)
+#define	FPAZDIV		(1<<6)
+#define	FPAINVAL	(1<<9)
+
+/*
+ * exception enable bits in the fsr
+ */
+#define	FPINEX		(1<<23)
+#define	FPOVFL		(1<<26)
+#define	FPUNFL		(1<<25)
+#define	FPZDIV		(1<<24)
+#define	FPINVAL		(1<<27)
+
+/*
+ * rounding
+ */
+#define	FPRMASK		(3<<30)
+#define	FPRNR		(0<<30)
+#define	FPRNINF		(3<<30)
+#define	FPRPINF		(2<<30)
+#define	FPRZ		(1<<30)
+
+/*
+ * precision
+ */
+#define	FPPDBL		0
+
+#define	FPFCR		(FPRMASK|FPINEX|FPOVFL|FPUNFL|FPZDIV|FPINVAL)
+#define	FPFSR		(FPAINEX|FPAOVFL|FPAUNFL|FPAZDIV|FPAINVAL)
+
+static ulong
+getfcr(void)
+{
+	ulong v;
+
+	asm("	st	%fsr, [%fp-8]");
+	return v;
+}
+
+static void
+setfcr(ulong v)
+{
+	ulong vv;
+
+	vv = (getfcr() & ~FPFCR) | (v & FPFCR);
+	asm("	ld	[%fp-4], %fsr");
+}
+
+static ulong
+getfsr(void)
+{
+	ulong v;
+
+	asm("	st	%fsr, [%fp-8]");
+	return v;
+}
+
+static void
+setfsr(ulong v)
+{
+	ulong vv;
+
+	vv = (getfsr() & ~FPFSR) | (v & FPFSR);
+	asm("	ld	[%fp-4], %fsr");
+}
+
-- 
cgit v1.2.3