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| author | Richard Miller <miller.research@gmail.com> | 2020-11-09 11:33:44 +0000 |
|---|---|---|
| committer | Richard Miller <miller.research@gmail.com> | 2020-11-09 11:33:44 +0000 |
| commit | 2a571cc0ece4073eb56d5ccfc3e061a09a353e13 (patch) | |
| tree | 7daccd0dac9144a55a00570e3fb11af7f0862659 /utils/libmach/setmach.c | |
| parent | ed97654bd7a11d480b44505c8300d06b42e5fefe (diff) | |
Add riscv and riscv64 support to libmach
Diffstat (limited to 'utils/libmach/setmach.c')
| -rw-r--r-- | utils/libmach/setmach.c | 16 |
1 files changed, 14 insertions, 2 deletions
diff --git a/utils/libmach/setmach.c b/utils/libmach/setmach.c index 7247881c..8bfd3c18 100644 --- a/utils/libmach/setmach.c +++ b/utils/libmach/setmach.c @@ -16,9 +16,9 @@ struct machtab }; extern Mach mmips, msparc, mi386, mamd64, - marm, mmips2be, mmips2le, mpower, mpower64; + marm, mmips2be, mmips2le, mpower, mpower64, mriscv, mriscv64; extern Machdata mipsmach, sparcmach, i386mach, - armmach, mipsmach2le, powermach; + armmach, mipsmach2le, powermach, riscvmach, riscv64mach; /* * machine selection table. machines with native disassemblers should @@ -99,6 +99,18 @@ Machtab machines[] = APOWER64, &mpower64, &powermach, }, + { "riscv", + FRISCV, + FRISCVB, + ARISCV, + &mriscv, + &riscvmach, }, + { "riscv64", + FRISCV64, + FRISCV64B, + ARISCV64, + &mriscv64, + &riscv64mach, }, { 0 }, /*the terminator*/ }; |