diff options
| author | Konstantin Kirik (snegovick) <snegovick@uprojects.org> | 2026-01-07 02:56:45 +0300 |
|---|---|---|
| committer | Konstantin Kirik (snegovick) <snegovick@uprojects.org> | 2026-01-07 02:56:45 +0300 |
| commit | 0d681a4d837cc867f45e52e57b733312a97d07b5 (patch) | |
| tree | 90e55a09a5eff0fae0c4285412a537d2476ab547 /os/drivers/clock | |
| parent | 2ba825dbeaf58d96582659aaebf6ad2b898e85de (diff) | |
Update reg io in stm32f769 rcc
Diffstat (limited to 'os/drivers/clock')
| -rw-r--r-- | os/drivers/clock/stm32f769_rcc.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/os/drivers/clock/stm32f769_rcc.h b/os/drivers/clock/stm32f769_rcc.h index 34cfd259..21e4f419 100644 --- a/os/drivers/clock/stm32f769_rcc.h +++ b/os/drivers/clock/stm32f769_rcc.h @@ -880,8 +880,8 @@ typedef struct * @note The main PLL can not be disabled if it is used as system clock source * @note The main PLL is disabled by hardware when entering STOP and STANDBY modes. */ -#define __HAL_RCC_PLL_ENABLE() sys_set_bit(RCC->CR, RCC_CR_PLLON) -#define __HAL_RCC_PLL_DISABLE() sys_clear_bit(RCC->CR, RCC_CR_PLLON) +#define __HAL_RCC_PLL_ENABLE() SET_BIT(RCC->CR, RCC_CR_PLLON) +#define __HAL_RCC_PLL_DISABLE() CLEAR_BIT(RCC->CR, RCC_CR_PLLON) /** @brief Macro to configure the PLL clock source. * @note This function must be used only when the main PLL is disabled. |